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Compiling corrupted firmwares...

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vitormhenrique
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VESC GoldVESC Original
Joined: 2019-08-29 17:28
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Compiling corrupted firmwares...

OK, So trying to change some stuff on the firmware I completely broke it..

I can still flash using STLink, it says success but VESC does not show on the serial...

openocd -f board/stm32f4discovery.cfg -c "reset_config trst_only combined" -c "program build/BLDC_4_ChibiOS.elf verify reset exit" # For openocd 0.9
Open On-Chip Debugger 0.10.0
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
adapter speed: 2000 kHz
adapter_nsrst_delay: 100
none separate
srst_only separate srst_nogate srst_open_drain connect_deassert_srst
trst_only combined trst_push_pull
Info : Unable to match requested speed 2000 kHz, using 1800 kHz
Info : Unable to match requested speed 2000 kHz, using 1800 kHz
Info : clock speed 1800 kHz
Info : STLINK v2 JTAG v17 API v2 SWIM v4 VID 0x0483 PID 0x3748
Info : using stlink api v2
Info : Target voltage: 3.249867
Info : stm32f4x.cpu: hardware has 6 breakpoints, 4 watchpoints
adapter speed: 2000 kHz
target halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x0800c000 msp: 0x20000800
adapter speed: 8000 kHz
** Programming Started **
auto erase enabled
Info : device id = 0x10076413
Info : flash size = 1024kbytes
Info : Padding image section 0 with 48704 bytes
Info : Padding image section 1 with 4 bytes
Info : Padding image section 2 with 91720 bytes
target halted due to breakpoint, current mode: Thread
xPSR: 0x61000000 pc: 0x20000046 msp: 0x20000800
wrote 393216 bytes from file build/BLDC_4_ChibiOS.elf in 15.603326s (24.610 KiB/s)
** Programming Finished **
** Verify Started **
target halted due to breakpoint, current mode: Thread
xPSR: 0x61000000 pc: 0x2000002e msp: 0x20000800
target halted due to breakpoint, current mode: Thread
xPSR: 0x61000000 pc: 0x2000002e msp: 0x20000800
target halted due to breakpoint, current mode: Thread
xPSR: 0x61000000 pc: 0x2000002e msp: 0x20000800
verified 252780 bytes in 0.712646s (346.393 KiB/s)
** Verified OK **
** Resetting Target **
adapter speed: 2000 kHz
shutdown command invoked

 

vitormhenrique
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I fixed by plashing from the VESC 6 instead of the st-link.

Could anyone explain why?

 

edit: able to fix with st-link on windows and firmware from github.

vitormhenrique
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Ok, fucked again and now vesc 6 can not connect to it anymore,

I'm getting the following on VESC Terminal: 

AP transaction in progress.  Target may not be usable.

 AP 255: IDR=ffffffff CFG=ffffffff BASE=ffffffff CSW=ffffff48

Could someone please help?

vitormhenrique
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Figured that it's somehow my environment that is building a "corrupted" firmware, only changing the conf general from

//#define HW_SOURCE "hw_410.c" // Also for 4.11 and 4.12
//#define HW_HEADER "hw_410.h" // Also for 4.11 and 4.12

// Benjamins first HW60 PCB with PB5 and PB6 swapped
//#define HW60_VEDDER_FIRST_PCB

// Mark3 version of HW60 with power switch and separate NRF UART.
//#define HW60_IS_MK3

#define HW_SOURCE "hw_60.c"
#define HW_HEADER "hw_60.h"

to 

#define HW_SOURCE "hw_410.c" // Also for 4.11 and 4.12
#define HW_HEADER "hw_410.h" // Also for 4.11 and 4.12

// Benjamins first HW60 PCB with PB5 and PB6 swapped
//#define HW60_VEDDER_FIRST_PCB

// Mark3 version of HW60 with power switch and separate NRF UART.
//#define HW60_IS_MK3

// #define HW_SOURCE "hw_60.c"
// #define HW_HEADER "hw_60.h"

the binary generated has a different checksum from the one on github.

Ideas?

vitormhenrique
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Follow printscreen of comparing binnaries: 

Screen Shot 2020-02-23 at 9.41.23 PM.png

vitormhenrique
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Donwgraded to gcc-arm-none-eabi-7-2018-q2-update and could compile a firmware that runs! Please update the documentation and let people know what toolchain is suported!

district9prawn
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Posts: 69

Yea its still not written anywhere =(. Good work figuring it out. It definitely took me longer.