# Custom Hardware - FET shoot-through problem - oscilloscope captures

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ben5243
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Joined: 2019-02-05 19:46
Posts: 3
Custom Hardware - FET shoot-through problem - oscilloscope captures

Hi all, I'm new to VESC project and have only worked with trapezoidal BLDC control before (no FOC)

I am testing a VESC custom design and it draws a very irregular current spike at the PWM frequency (20kHz).  The worst case is when the motor is at 0RPM but the spikes are still visible when the motor is spinning.  This is the input current measured over a 0.0025Ohm resistor with the motor stopped:

https://imgur.com/a/rK2raMS

Frequency of the spikes are at 20kHz (switching frequency)

Close up of the spikes.  Peak is about 80mV/0.0025Ohm = 32A

I suspect this is current shoot-through from high to low side of the FETs.  The design uses the DRV8302 chip so I increased the hardware deadtime to the maximum 500ns with a 150kOhm resistor.  I also changed the firmware "#define mcpwm_dead_time_cycles 60" to 200 but neither had any change.

I have done some reading about shoot-through caused by dv/dt on the FETs but I'm not sure if that is what is happening here or if I just have a setting in VESC incorrect.  I scope'd the high side and low side gates of one phase.  Channel 1 (yellow) is low side gate, Channel 2 (blue) is high side gate.  Every pulse is different on Channel 2 and the first "ledge" as it falls is different timing every time.  The driver seems to release the high side gate about 800-1200ns before the low side gate turns on, but the high side gate does not fall to zero quick enough.

Also, here is a scope capture of the motor phase (channel 1 - yellow) and the low side gate (channel 2 - blue)

About 3 divisions (750ns) before the low side gate (blue) increases, the motor phase voltage (yellow) increases about 1V, I think this is when the high side is released and the body diode is conducting?

Then when the low side gate (blue) turns on, the shoot-through occurs?

Could anyone more familiar with this type of BLDC driving comment on if this is normal or what can be done to eliminate the current surges?  I've mitigated them somewhat with more bulk capacitance but the current spike will damage and degrade the capacitors over time.

Here is the FET driving circuit.  The nodes M_Hx are directly connected to the pins of the DRV8302

Thanks in advance for any help

El3ctr0n1c
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Last seen: 1 year 3 months ago
Joined: 2019-02-20 19:57
Posts: 4

Hi,

Try add low ESR/ESL (f.e ceramic or metal film cap) as close as possible to MOSFET's on DC rail. I think it isn't shoot trough. Shoot trough = MOSFET fry/blow up. It's looks like inductive spikes (measured DC bus voltage).

Your measurement may be affected by EMI/EMC from PCB.Oscilloscope probe can catch this things.

TechAUmNu
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Last seen: 3 days 8 hours ago
Joined: 2017-09-22 01:27
Posts: 571

A picture of your power stage would certainly help a lot.

Your scope traces for the gates look ok. The initial reduction in voltage you see before the low side turns on is normal. What is your gate drive voltage?

I agree those look like inductive spikes from fast edges on the fets.

Also to adjust deadtime you need to have this line in your .h file for your hardware. (this is what it looks like on latest firmware)

#define HW_DEAD_TIME_NSEC 660.0