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VESC 4.12 Hardware Bringup Checks

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Joined: 2020-05-04 02:26
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VESC 4.12 Hardware Bringup Checks

Hi Vesc Folks, 
I'm working on a project where we are updating to the DRV8353 chip to gain 3 shunts and 100v capability. We are having issues getting through the transition to closed loop controls as there seems to be some signal mismatch. It seems like there are a few signals that have to match exactly, but it's hard to know exactly what they should be vs what they are on a schematic. We are starting with only 2 phase shunts to try to mimic the 4.12 hardware (enertion and flipsky mini boards available for comparison). The pinouts are different and the shunt polarities are different, so we're trying to bring them up slowly. 

Example of what I'm asking for:

1) When Phase A is positive voltage command (say 0.51 duty vs 0.5 duty on B and C) then current on phase A should be negative
2) When Phase A voltage is positive, the voltage readout should be positive (example, using a function generator on the phase A output terminal)

3) When starting in current control mode, use a "low power" command to ease into the current regulation. Example, limited modulation index or low current faults

4) When current control starts, ensure certain signals progress properly (example Ialpha, Ibeta progress in a certain way)

Does this type of bringup procedure exist for any of you?